C4: Heterogeneous Packaging of Wide Band Gap Powerelectronics – Moving from IPM to SiP
Instructor: Doug Hopkins, North Carolina State University
With the recent availability of essentially chip-scale packaged GaN and higher voltage
SiC Wide Band Gap (WBG) power devices, the onus is on packaging engineers to expand their understanding of the unprecedented high-speed and high-power-density characteristics of these devices and the impact on package design. The trend for the past several years has been to place the WBG devices in packages designed for Si, but only to provide end users with familiar outlines. However, the WBG devices have matured sufficiently to show that only high levels of package integration will allow the claimed higher WBG performances.
The course topics are:
- Understanding critical operating characteristics of WBG power devices from the perspective needed by the packaging engineer. (This is critical due to the unprecedented di/dt’s, dv/dt’s, and dT/dt’s from WBG device switching.)
- A review of gate driver circuits that operate at >10X frequency of the power stages, and are
integrated into devices and integrated through packaging
- Introduction to planar power GaN and on-chip functional integration
- Developing design rules for packaging engineers and showing trends to multidisciplinary power electronics packaging, and heterogeneous integration of power components and devices, including quilt packaging. (incl. Yole studies, and comparisons of traditional packaging approaches)
- Step-by-step presentation of multiphysics modeling for design, and use of Q3D for power
circuit parameter extraction and design refinement
- Use of case studies to support the above topic
Dr. Douglas Hopkins is Professor and Director of the Laboratory for "Packaging Research in Electronic Energy Systems" as part of the NSF-funded FREEDM Systems Center at North Carolina State University in Raleigh, NC. He was formerly with SUNY Buffalo as Director of the "Electronic Power and Energy Research Lab". He received his Ph.D. from Virginia Tech, worked for GE's and Carrier's R&D Centers, and held visiting positions at several national labs. He is an IEEE senior member and IMAPS fellow. He is a founding member of IMAPS Subcommittee on Power Packaging, now chairs the technical subcommittee on Electronic Energy Packaging in IEEE-CPMT and member of the IEEE-PELS technical committee on Emerging Technologies. He has authored over 100 journal and conference publications, received three ISHM/IMAPS awards.